Description
Silicom C5010X FB2XXVG 25GbE Dual SFP28 Accelerator Card High Profile Micro-USB
IEEE standard - IEEE 802.3 10GE, 25GE
Interfaces
▪ Physical interface: 2 x SFP28 slots
▪ Supports SFP+/SFP28 modules with Multimode SR (850nm), single mode LR (1310nm),
multimode LRM (1310 nm), or Direct Attached Copper (Twinax) and others
▪ Data rate: 2x10, 2x25, Gbps
▪ Support for SyncE
Interfaces
Network
▪ Dual 25GbE, using SFP28
Host
▪ PCIe gen4 x 8 (x16 physical)
▪ NCSI RBT
▪ Support for SMBUS
SoC
▪ PCIe v3 x 8
▪ USB NIC
▪ UART
General Technical Specifications
SoC details
Intel® Xeon® D-1612
▪ 4 x86 64 bit cores @1.5GHz
▪ 8 threads
▪ 6MB cache
▪ VT-d, VT-x
▪ Intel® AVX2
▪ AES-NI
▪ 16GB DDR ECC
FPGA Details
Intel® Stratix 10 DX 1100
▪ Intel® Hyperflex™ core architecture
▪ Intel® Embedded Multi-die Interconnect Bridge (EMIB)
▪ PCIx Gen4 x16 hard IP, SRIOV
▪ Fixed point and IEEE 754 compliant floating-point variable precision digital signal
processing (DSP) block
▪ Internal memory
• M20K, 107Mb
• eSRAM, 47.25Mb
• MLAB
▪ 1,325,000 ALM
▪ Quad-core 64-bit Arm® Cortex®-A53 embedded processor @1.5 GHz
▪ 4GB DDR
▪ Configuration flash can be made to support multiple boot images for automatic fallback to
fail safe
▪ Upload of FPGA configuration to flash via PCIe
▪ Direct FPGA configuration via the onboard JTAG dongle
On-board Memory
▪ 16GB DDR ECC for SoC
▪ 4GB DDR for FPGA
▪ User configurable space in flash RAM for permanent storage
▪ Configuration flash RAM for boot images
On-board Clock
▪ PCIe clock: 100 MHz
▪ Core Clock 125Mhz
▪ 2 x differential 312.5 MHz SerDes clock for Ethernet
▪ 2 x differential 266.67 MHz/300MHz/333.33MHz clock for Memory
▪ Calibration clock 125MHz, 100MHz, 25MHz
▪ 50 MHz clock
Additional Board Support
▪ On-board power and temperature sensors (via SMBus/I2C)
▪ FPGA controlled Link and Activity LED for each port. 2 for each SFP28
▪ Board status LEDs
▪ FPGA Reset via host I2C
Environment
▪ Full height, ½ length 111.15 x 167.65 mm with bracket
▪ Storage temperature: -30 - 70°C -22 – 158°F
▪ Operating temperature (card inlet): 0 – 55°C, 30 – 130°F
▪ Operating humidity: 20 – 80%
▪ Hardware compliance: RoHS, FCC, CE
Power
▪ Max 75W
▪ Passive cooling
▪ Power and temperature monitoring via SMBus/I2C
Management ▪ SoC boot options: PXE, SATA
▪ SoC control interfaces: USB, UART, network
Networking
▪ A configurable packet processor IP core
▪ Extensive configuration API
▪ Packet forwarding and bridging across network, main host and SoC
▪ Parsing, match and action operations
▪ Bandwidth rate limit
3rd party solution support ▪ Napatech Link™ Virtualization Software and SmartNIC solution Extensive configuration
API
